BSN012N03LSI opti mos tm power-mosfet features ? optimized for high performance buck converter ? monolithic integrated schottky like diode ? very low on-resistance r ds(on) @ v gs =4.5 v ? 100% avalanche tested ? n-channel ? qualified according to jedec 1) for target applications ? pb-free lead plating; rohs compliant ? halogen-free according to iec61249-2-21 maximum ratings, at t j =25 c, unless otherwise specified parameter symbol conditions unit continuous drain current i d v gs =10 v, t c =25?c 50 a v gs =10 v, t c =100?c 50 v gs =4.5 v, t c =25?c 50 v gs =4.5 v, t c =100?c 50 v gs =10 v, t a =25?c, r thja =50?k/w 2) 36 pulsed drain current 3) i d,pulse t c =25?c 200 avalanche current, single pulse 4) i as t c =25?c 50 avalanche energy, single pulse e as i d =50?a, r gs =25? w 145 mj gate source voltage v gs 20 v value 1) j-std20 and jesd22 2) device on 40 mm x 40 mm x 1.5 mm epoxy pcb fr4 with 6 cm2 (one layer, 70 m thick) copper area for drain connection. pcb is vertical in still air. type package marking BSN012N03LSI lg - uson - 6 - 1 012n03li a 56 nc v ds 30 v r ds(on),max 1.2 m w i d 50 q oss 33 nc q g (0v..10v) product summary lg - uson - 6 - 1 rev. 2.0 page 1 2014-05-23
BSN012N03LSI maximum ratings, at t j =25 c, unless otherwise specified parameter symbol conditions unit power dissipation p tot t c =25?c 78 w t a =25 c, r thja =50?k/w 2) 2.5 operating and storage temperature t j , t stg -55 ... 150 c iec climatic category; din iec 68-1 55/150/56 parameter symbol conditions unit min. typ. max. thermal characteristics thermal resistance, junction - case r thjc bottom - - 1.6 k/w top - - 1 device on pcb r thja 6 cm 2 cooling area 2) - - 50 electrical characteristics, at t j =25 c, unless otherwise specified static characteristics drain-source breakdown voltage v (br)dss v gs =0?v, i d =1?ma 30 - - v breakdown voltage temperature coefficient d v (br)dss /d t j i d =10?ma, referenced to 25?c - 15 - mv/k gate threshold voltage v gs(th) v ds = v gs , i d =250?a 1.2 - 2 v zero gate voltage drain current i dss v ds =20?v, v gs =0?v, t j =25?c - - 0.5 ma v ds =20?v, v gs =0?v, t j =125?c - 3 - gate-source leakage current i gss v gs =20?v, v ds =0?v - 10 100 na drain-source on-state resistance r ds(on) v gs =4.5?v, i d =30?a - 1.3 1.6 m w v gs =10?v, i d =30?a - 1.0 1.2 gate resistance r g 0.3 0.5 1.0 w transconductance g fs | v ds |>2| i d | r ds(on)max , i d =30?a 80 160 - s value values 3) see figure 3 for more detailed information rev. 2.0 page 2 2014-05-23
BSN012N03LSI parameter symbol conditions unit min. typ. max. dynamic characteristics input capacitance c iss - 3600 4800 pf output capacitance c oss - 1600 2200 reverse transfer capacitance c rss - 220 - turn-on delay time t d(on) - 3.9 - ns rise time t r - 7.8 - turn-off delay time t d(off) - 27 - fall time t f - 5.2 - gate charge characteristics 5) gate to source charge q gs - 8.6 11 nc gate charge at threshold q g(th) - 5.7 - gate to drain charge q gd - 8.2 11 switching charge q sw - 11 - gate charge total q g - 28 37 gate plateau voltage v plateau - 2.4 - v gate charge total q g v dd =12?v, i d =30?a, v gs =0?to?10?v - 56 74 nc gate charge total, sync. fet q g(sync) v ds =0.1?v, v gs =0?to?4.5?v - 23 - output charge q oss v dd =12?v, v gs =0?v - 33 44 reverse diode diode continuous forward current i s - - 96 a diode pulse current i s,pulse - - 200 diode forward voltage v sd v gs =0?v, i f =12?a, t j =25?c - 0.58 v reverse recovery charge q rr v r =15?v, i f =12 a, d i f /d t =400?a/s - 5 - nc 5) see figure 16 for gate charge parameter definition 4) see figure 13 for more detailed information t c =25?c values v gs =0?v, v ds =12?v, f =1?mhz v dd =12?v, v gs =10?v, i d =30?a, r g,ext =1.6? w v dd =12?v, i d =30?a, v gs =0?to?4.5?v rev. 2.0 page 3 2014-05-23
BSN012N03LSI 1 power dissipation 2 drain current p tot =f( t c ) i d =f( t c ); v gs 10 v 3 safe operating area 4 max. transient thermal impedance i d =f( v ds ); t c =25 c; d =0 z thjc =f( t p ) parameter: t p parameter: d = t p / t 1 s 10 s 100 s 1 ms 10 ms dc 10 - 1 10 0 10 1 10 2 10 - 1 10 0 10 1 10 2 10 3 i d [a] v ds [v] limited by on - state resistance single pulse 0.01 0.02 0.05 0.1 0.2 0.5 10 - 6 10 - 5 10 - 4 10 - 3 10 - 2 10 - 1 10 0 10 - 3 10 - 2 10 - 1 10 0 10 1 z thjc [k/w] t p [s] 0 10 20 30 40 50 60 70 80 90 0 40 80 120 160 p tot [w] t c [ c] 0 20 40 60 80 100 120 0 40 80 120 160 i d [a] t c [ c] rev. 2.0 page 4 2014-05-23
BSN012N03LSI 5 typ. output characteristics 6 typ. drain-source on resistance i d =f( v ds ); t j =25 c r ds(on) =f( i d ); t j =25 c parameter: v gs parameter: v gs 7 typ. transfer characteristics 8 typ. forward transconductance i d =f( v gs ); | v ds |>2| i d | r ds(on)max g fs =f( i d ); t j =25 c parameter: t j 3.5 v 4 v 4.5 v 5 v 7 v 8 v 10 v 0 0.5 1 1.5 2 0 10 20 30 40 50 r ds(on) [m w ] i d [a] 25 c 150 c 0 80 160 240 320 400 0 1 2 3 4 5 i d [a] v gs [v] 0 80 160 240 320 400 0 40 80 120 160 g fs [s] i d [a] 2.8 v 3 v 3.2 v 3.5 v 4 v 4.5 v 5 v 10 v 0 100 200 300 400 500 600 700 800 0 1 2 3 i d [a] v ds [v] rev. 2.0 page 5 2014-05-23
BSN012N03LSI 9 drain-source on-state resistance 10 typ. gate threshold voltage r ds(on) =f( t j ); i d =30 a; v gs =10 v v gs(th) =f( t j ); v gs = v ds 11 typ. capacitances 12 forward characteristics of reverse diode c =f( v ds ); v gs =0 v; f =1 mhz i f =f( v sd ) parameter: t j typ 0 0.5 1 1.5 2 2.5 3 - 60 - 20 20 60 100 140 180 r ds(on) [m w ] t j [ c] 10 ma 0 0.5 1 1.5 2 2.5 - 60 - 20 20 60 100 140 180 v gs(th) [v] t j [ c] ciss coss crss 10 2 10 3 10 4 100 1000 10000 0 5 10 15 20 25 c [pf] v ds [v] - 55 c 25 c 125 c 150 c 10 - 1 10 0 10 1 10 2 10 3 0 0.4 0.8 1.2 i f [a] v sd [v] rev. 2.0 page 6 2014-05-23
BSN012N03LSI 13 avalanche characteristics 14 typ. gate charge i as =f( t av ); r gs =25 w v gs =f( q gate ); i d =30 a pulsed parameter: t j(start) parameter: v dd 15 typ. drain-source leakage current 16 gate charge waveforms i dss =f( v ds ); v gs =0 v parameter: t j 25 c 75 c 100 c 125 c 10 - 6 10 - 5 10 - 4 10 - 3 10 - 2 0 5 10 15 20 i dss [a] v sd [v] 25 c 100 c 125 c 1 10 100 1 10 100 1000 i av [a] t av [s] 5 v 12 v 20 v 0 2 4 6 8 10 12 0 10 20 30 40 50 60 70 v gs [v] q gate [nc] rev. 2.0 page 7 2014-05-23 v gs q gate v gs(th) q g(th) q gs q gd q sw q g
BSN012N03LSI package outline lg-uson-6-1 lg-uson-6-1: outline rev. 2.0 page 8 2014-05-23
BSN012N03LSI published by infineon technologies ag 81726 munich, germany ? 2010 infineon technologies ag all rights reserved. legal disclaimer the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies components may be used in life-support devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered. rev. 2.0 page 9 2014-05-23
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